🔀 Layouts

Ensure Bill of Materials with vendor links and datasheets are ready
Ensure schematic is divided up into functional logical blocks
Refer to the correct datasheet version number
Associate mostly SMD components with size 0603 or other standards for ease of manufacturing / assembly
Ensure ERC passes

Place components that require physical considerations at the edge E.g. connectors, switches
Group components into functional building blocks where possible with grid 25 mils (0.025 inch)
Place decoupling capacitors physically and electrically close to the desired components
Make notes on the long rats nest

Decide which logical blocks are on the front vs back layers
Place connectors, battery holders, LEDs, switches, buttons and antennas for mechanical considerations with grid 25 mils
Take note of critical routes such as differential pairs

Lay down power and ground planes first
Connect all the power and ground tracks to the planes
Route components, signals and power paths on top layer and ground return on bottom layer
Layout critical tracks and route them first E.g. uUSB differential pairs
Snake tracks around the board
Use standard grid size 10 mils for routing traces
Clear all errors for DRC

Run b to refill all zones on all layers in KiCad
Ensure ERC and DRC are passing
Look through the 3D view
Print individual layers and check them
Check manufacturer's Gerber file format
Export layers F.Cu, B.Cu, F.SilkS B.SilkS, F.Mask, B.Mas, Edge.Cuts in Gerber format
Export drill files NPTH.drl, PTH.drl
Check Gerber format layer by layer
Check Solder mask openings smaller than the solder pad for stencils
Check no text on solder pads
Generate Drill map table and import as a graphic in the layout
Git tag the gerber compressed folder and create a release git tag -a V1.0 -m "V1.0" && git push --tags
Edit the release tag to add the gerber zip folder

Optional footprints to include apart from the netlist